pub struct W(/* private fields */);
Expand description
Register ISR
writer
Implementations§
§impl W
impl W
pub fn rsf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, RSF_AW, BitM, 5>
pub fn rsf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, RSF_AW, BitM, 5>
Bit 5 - Registers synchronization flag This bit is set by hardware each time the calendar registers are copied into the shadow registers (RTC_SSRx, RTC_TRx and RTC_DRx). This bit is cleared by hardware in initialization mode, while a shift operation is pending (SHPF=1), or when in bypass shadow register mode (BYPSHAD=1). This bit can also be cleared by software. It is cleared either by software or by hardware in initialization mode.
pub fn init(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, INIT_A, BitM, 7>
pub fn init(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, INIT_A, BitM, 7>
Bit 7 - Initialization mode
pub fn alraf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, ALRAF_AW, BitM, 8>
pub fn alraf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, ALRAF_AW, BitM, 8>
Bit 8 - Alarm A flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR). This flag is cleared by software by writing 0.
pub fn alrbf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, ALRBF_AW, BitM, 9>
pub fn alrbf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, ALRBF_AW, BitM, 9>
Bit 9 - Alarm B flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR). This flag is cleared by software by writing 0.
pub fn wutf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, WUTF_AW, BitM, 10>
pub fn wutf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, WUTF_AW, BitM, 10>
Bit 10 - Wakeup timer flag This flag is set by hardware when the wakeup auto-reload counter reaches 0. This flag is cleared by software by writing 0. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again.
pub fn tsf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TSF_AW, BitM, 11>
pub fn tsf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TSF_AW, BitM, 11>
Bit 11 - Time-stamp flag This flag is set by hardware when a time-stamp event occurs. This flag is cleared by software by writing 0.
pub fn tsovf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TSOVF_AW, BitM, 12>
pub fn tsovf(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TSOVF_AW, BitM, 12>
Bit 12 - Time-stamp overflow flag This flag is set by hardware when a time-stamp event occurs while TSF is already set. This flag is cleared by software by writing 0. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a time-stamp event occurs immediately before the TSF bit is cleared.
pub fn tamp1f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 13>
pub fn tamp1f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 13>
Bit 13 - RTC_TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP1 input. It is cleared by software writing 0
pub fn tamp2f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 14>
pub fn tamp2f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 14>
Bit 14 - RTC_TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP2 input. It is cleared by software writing 0
pub fn tamp3f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 15>
pub fn tamp3f(&mut self) -> BitWriterRaw<'_, u32, ISR_SPEC, TAMP1F_AW, BitM, 15>
Bit 15 - RTC_TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP3 input. It is cleared by software writing 0
Methods from Deref<Target = W<ISR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.