Struct daisy::pac::pwr::d3cr::R

pub struct R(/* private fields */);

Register D3CR reader

Implementations

impl R

pub fn vosrdy(&self) -> BitReaderRaw<bool>

Bit 13 - VOS Ready bit for VCORE voltage scaling output selection. This bit is set to 1 by hardware when Bypass mode is selected in PWR control register 3 (PWR_CR3).

pub fn vos(&self) -> FieldReaderRaw<u8, u8>

Bits 14:15 - Voltage scaling selection according to performance These bits control the VCORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling shall be changed before increasing the system frequency. When decreasing performance, the system frequency shall first be decreased before changing the voltage scaling.

Methods from Deref<Target = R<D3CR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<D3CR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<D3CR_SPEC>> for R

fn from(reader: R<D3CR_SPEC>) -> R

Converts to this type from the input type.