Struct daisy::pac::pwr::csr1::R

pub struct R(/* private fields */);

Register CSR1 reader

Implementations

impl R

pub fn pvdo(&self) -> BitReaderRaw<bool>

Bit 4 - Programmable voltage detect output This bit is set and cleared by hardware. It is valid only if the PVD has been enabled by the PVDE bit. Note: since the PVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the PVDE bit is set.

pub fn actvosrdy(&self) -> BitReaderRaw<bool>

Bit 13 - Voltage levels ready bit for currently used VOS and SDLEVEL This bit is set to 1 by hardware when the voltage regulator and the SD converter are both disabled and Bypass mode is selected in PWR control register 3 (PWR_CR3).

pub fn actvos(&self) -> FieldReaderRaw<u8, u8>

Bits 14:15 - VOS currently applied for VCORE voltage scaling selection. These bits reflect the last VOS value applied to the PMU.

pub fn avdo(&self) -> BitReaderRaw<bool>

Bit 16 - Analog voltage detector output on VDDA This bit is set and cleared by hardware. It is valid only if AVD on VDDA is enabled by the AVDEN bit. Note: Since the AVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the AVDEN bit is set.

Methods from Deref<Target = R<CSR1_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CSR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CSR1_SPEC>> for R

fn from(reader: R<CSR1_SPEC>) -> R

Converts to this type from the input type.