Module daisy::pac::i2c1::icr

Access: No wait states

Structs

• ICR_SPEC
  Access: No wait states
• W
  Register ICR writer

Enums

• ADDRCF_AW
  Address matched flag clear Writing 1 to this bit clears the ADDR flag in the I2C_ISR register. Writing 1 to this bit also clears the START bit in the I2C_CR2 register.
• ALERTCF_AW
  Alert flag clear Writing 1 to this bit clears the ALERT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
• ARLOCF_AW
  Arbitration Lost flag clear Writing 1 to this bit clears the ARLO flag in the I2C_ISR register.
• BERRCF_AW
  Bus error flag clear Writing 1 to this bit clears the BERRF flag in the I2C_ISR register.
• NACKCF_AW
  Not Acknowledge flag clear Writing 1 to this bit clears the ACKF flag in I2C_ISR register.
• OVRCF_AW
  Overrun/Underrun flag clear Writing 1 to this bit clears the OVR flag in the I2C_ISR register.
• PECCF_AW
  PEC Error flag clear Writing 1 to this bit clears the PECERR flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
• STOPCF_AW
  Stop detection flag clear Writing 1 to this bit clears the STOPF flag in the I2C_ISR register.
• TIMOUTCF_AW
  Timeout detection flag clear Writing 1 to this bit clears the TIMEOUT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.

Type Aliases

• ADDRCF_W
  Field ADDRCF writer - Address matched flag clear Writing 1 to this bit clears the ADDR flag in the I2C_ISR register. Writing 1 to this bit also clears the START bit in the I2C_CR2 register.
• ALERTCF_W
  Field ALERTCF writer - Alert flag clear Writing 1 to this bit clears the ALERT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
• ARLOCF_W
  Field ARLOCF writer - Arbitration Lost flag clear Writing 1 to this bit clears the ARLO flag in the I2C_ISR register.
• BERRCF_W
  Field BERRCF writer - Bus error flag clear Writing 1 to this bit clears the BERRF flag in the I2C_ISR register.
• NACKCF_W
  Field NACKCF writer - Not Acknowledge flag clear Writing 1 to this bit clears the ACKF flag in I2C_ISR register.
• OVRCF_W
  Field OVRCF writer - Overrun/Underrun flag clear Writing 1 to this bit clears the OVR flag in the I2C_ISR register.
• PECCF_W
  Field PECCF writer - PEC Error flag clear Writing 1 to this bit clears the PECERR flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
• STOPCF_W
  Field STOPCF writer - Stop detection flag clear Writing 1 to this bit clears the STOPF flag in the I2C_ISR register.
• TIMOUTCF_W
  Field TIMOUTCF writer - Timeout detection flag clear Writing 1 to this bit clears the TIMEOUT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.